1. Field of the Invention
The present invention relates to a photoelectric conversion apparatus widely used in particularly a video camera, a digital still camera, and an image input apparatus for an image scanner. In particular, the invention relates to an output circuit of the photoelectric conversion apparatus.
2. Description of the Related Art
In a conventional photoelectric conversion apparatus, an electromagnetic field noise emanating from the outside generates a noise voltage in wiring in the apparatus, which becomes a noise output. Thus, an S/N (signal-to-noise) ratio is degraded. Japanese Patent Laid-Open No. 2004-186790 discloses a configuration of a differential amplifier provided to a horizontal common output line. In the differential amplifier, a differential output between a signal level (S) and a reset level (N) is output. FIG. 11 illustrates a photoelectric conversion apparatus disclosed in Japanese Patent Laid-Open No. 2004-186790. Two horizontal common output lines (20a and 20b) are arranged, and a capacitive feedback type fully differential amplifier, in other words, a differential input-differential output amplifier 23 is arranged.
Capacitors 24a and 24b are arranged between an output terminal functioning as a feedback loop of a differential amplifier 23 and the horizontal common output lines. This configuration is made for obtaining a constant open loop gain, and the open loop gain of the differential amplifier 23 determines the accuracy and speed.
In recent years, there is a trend that the size of a photoelectric conversion apparatus used in a digital single-lens reflex camera is set larger and the number of pixels is increased. In such circumstances, with the configuration disclosed in Japanese Patent Laid-Open No. 2004-186790, the number of columns connected to the horizontal common output line is increased and the number of switches connected to the horizontal common output line is also increased. Thus, the parasitic capacitance of the horizontal common output line is increased. According to the configuration of the differential amplifier illustrated in FIG. 11, due to the increase in the parasitic capacitance of the horizontal common output line, the reading speed is lowered and the reading gain dispersion becomes larger. Hereinafter, the above-mentioned phenomena will be described in detail.
In FIG. 11, from CapN and CapS, a time constant τ of a path of a signal to be input to the differential amplifier via the horizontal common output line is examined. The parasitic capacitance of the horizontal common output line becomes a lead on the output terminal and affects the speed via the capacitors 24a and 24b functioning as the feedback paths. To be more specific, when a capacitance value of CapS and CapN is set as CT, a capacitance value of the capacitors 24a and 24b is set as CF, a parasitic capacitance of the horizontal common output line is set as CH, an external capacitance value of an output terminal in the differential amplifier is set as CL, and an equivalent voltage-current conversion coefficient of the differential amplifier is set as Gm, the time constant τ can be represented by the following expression.
                                                        τ              =                              f                ⁡                                  (                                      CT                    ,                    CF                    ,                    CH                    ,                    CL                                    )                                                                                                        =                                                CL                  ⁡                                      (                                          CT                      +                      CH                                        )                                                  +                                  CL                  ·                  CF                                +                                                                            (                                              CT                        +                        CH                                            )                                        ·                                          CF                      /                      Gm                                        ·                    C                                    ⁢                                                                          ⁢                  2                                                                                        (        1        )            
For example, in a case where CL=10 pF, CT=2.5 pF, CF=1.25 pF, CH=10 pF, and Gm= 1/100 (Ω−1) are set, the time constant τ=12.25 nS is obtained. If 5τ is necessary for stability in a waveform response and 5τ is necessary for a waveform stability period, only an operation of approximately 7.5 MHz can be obtained. This decrease in speed significantly affects the high speed reading.
In addition, an approximate value of a gain A can be calculated on the basis of CT/CF. However, to be specific, the value is affected by the capacitance of the horizontal common output line and the open loop gain of the differential amplifier. This is represented by the following expression.A=(CT/CF)×[1−(CF+CT+CH)/(CF·Aop)]  (2)Wherein Aop denotes an open loop gain of the differential amplifier. To elaborate, with respect to (CT/CF) that is an approximate gain, when the parasitic capacitance CH of the horizontal common output line is large, the value is deviated from the approximate value and the gain is decreased. For example, when the same capacitance values are set as in the above-mentioned case and Aop is set as 40 dB, the error is 11%. Also, when Aop is set as 60 dB, the error is 1.1%. In this way, the error regarding the gain of the differential amplifier depends on the parasitic capacitance of the horizontal common output line and the open loop gain of the differential amplifier.
Also, in the differential amplifier using a feedback path, a high gain amplifier is used. This is because from Expression (2), as the open loop gain Aop of the differential amplifier is higher, the gain error is reduced. However, in a case where an amplifier of a high gain like 60 dB (1000 fold) is used, in a period where no signal is input, a high gain is caused even with respect to a minute input circuit offset, and a large output offset may be generated in some cases. An output offset generated at the same level as the two terminals of the differential output terminal is referred to as common-mode voltage, which can be suppressed through a differential computation performed in a signal processing unit in a later stage. However, in order to avoid a situation where the voltage level exceeds the input range of the signal processing unit, it is necessary to perform an adjustment at the common-mode level. A circuit configured to perform this adjustment is a common-mode feedback (CMFB) circuit. In this circuit, the two terminals for the differential output are monitored, an average level between the two is obtained, and feedback is applied to the differential amplifier so that the average becomes the same level as a reference voltage Vref.
However, when the feedback circuit using the CMFB is formed, a monitor circuit for taking out the output of the differential amplifier is connected to the output terminal, and a parasitic load is generated on the output terminal to decrease the operational speed. Also, it is necessary to prepare a phase compensation capacitance for the feedback path so that an oscillation is not caused. This capacitance load also becomes a factor of decreasing the operational speed.